Nonvolatile charge trapping layer devices, such as nitride read only memory (NROM), are known in the art. FIG. 1, to which reference is now made, shows an exemplary NROM cell 10. The NROM cell has a channel 100 in a substrate 105 between two bit lines 102 and 104 and an oxide-nitride-oxide (ONO) sandwich underneath gate 112. The oxide-nitride-oxide sandwich has a top oxide layer 111, typically of 10-17 nm thickness, a middle nitride layer 110, typically of 4-8 nm thickness, and a bottom oxide layer 109, typically of 4-8 nm thickness. The NROM cell may contain a chargeable area 106, defining one bit, located within middle nitride layer 110. A dual bit NROM cell may contain two separated and separately chargeable areas 106 and 108 located within middle nitride layer 110.
Bits 106 and 108 are individually accessible, and thus, may be programmed (conventionally noted as a ‘0’), erased (conventionally noted as a ‘1’) or read separately. Typically, programming and erasure of an NROM cell is performed with pulses of voltage on the drain, either bit line 102 or 104, and on the gate 112. After each pulse, a verify operation is performed in which the state of the cell is measured. Programming and verify operations continue until the cell will not pass any significant current during a read operation. During erasure, the opposite is true; erase and verify operations continue until a significant current is present in the cell during reading.
Reading a bit (106 or 108) involves determining if a threshold voltage Vt, as seen when reading the particular bit, is above (programmed) or below (erased) a read reference voltage level RD.
FIG. 2, to which reference is now made, illustrates the distribution of programmed and erased states of a memory chip (which typically has a large multiplicity of NROM cells formed into a memory array) as a function of threshold voltage Vt. There is an erase distribution 30, below a read level RD, whose rightmost point is an erase threshold voltage Vtc. Similarly, there is a program distribution 32 above read level RD whose leftmost point is a programmed threshold voltage Vtp.
The distance separating the two threshold voltages Vtp and Vtc is a window of operation WO. Window of operation WO is comprised of margins M0 and M1 as shown in FIG. 2. Margin M0 is the distance between read reference voltage level RD and program threshold voltage Vtp. Margin M1 is the distance between read reference voltage level RD and the erase threshold voltage Vtc. The distance at which program threshold voltage Vtp is kept from erase threshold voltage Vtc by margins M0 and M1 ensures that reads of ‘0’ and ‘1’ (indicating a programmed cell state and an erased cell state respectively) are accurate. As long as the margins are sufficiently large, reliable reads may be achieved.
Unfortunately, the margins may change significantly over time, which can cause a cell to cease operating. For example, as shown in FIG. 3 to which reference is now made, margins may shrink upon “Bake” treatment. In a Bake treatment, the cell is exposed to elevated temperatures in order to emulate the ability of a cell to retain information over an extended period of time and is one of a number of tests, performed on a memory array prior to its release as a commercial product
FIG. 3 plots threshold voltages Vtp and Vtc against time for an exemplary NROM cell after multiple cycles of programming and erasing. As shown in FIG. 3, the initial window of operation, WOi, and initial margins, M0i and M1i, are shown at t=0. At a later time, t=x, the margins M0x and M1x are seen to be reduced. Eventually, margins M0 and M1 and window of operation WO may shrink to such an extent that it may no longer be possible to achieve reliable reads and thus, the NROM cell will cease to be reliable. Thus, margin shrinkage, which may occur during the life of the product, is a limiting factor in the useful product life of an NROM cell.
It will be appreciated that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals may be repeated among the figures to indicate corresponding or analogous elements.